Semiconductor expert Wally Rhines joins Caspia Technologies as Chairman

Caspia Technologies, a leader in developing secure lifecycle solutions for system-on-chips (SoCs) and electronic components, has announced that Dr. Walden C. Rhines, a known figure in the semiconductor and EDA industries, has joined the company as Chairman.

 Rhines' expertise is expected to accelerate the deployment of Caspia’s assurance optimization capabilities across a broad range of commercial designs.

Developed by a team of university researchers, Caspia’s Secure Development Lifecycle (SDL) approach for SoCs involves early risk assessment, secure architecture and policies during planning, and the application of comprehensive design practices to enhance system security. 

The methodology includes thorough verification and validation to address vulnerabilities at every stage, providing end-to-end guidance with quantifiable results.

This approach, validated through various government-sponsored programs, is now ready for commercial deployment. Caspia’s first electronic design automation (EDA) product, CODAx, performs early analysis to identify and rectify design practices that could lead to security vulnerabilities and breaches.

 Dr. Mark Tehranipoor, co-founder and advisor for Caspia Technologies and Department Chair at the University of Florida’s Electrical and Computer Engineering Department, stated: 

“I am proud of the progress the Caspia team has made in the development of a fundamentally new approach to system assurance enhancement. “The holistic SDL approach to assurance optimisation will have significant impact.

I am absolutely delighted that Wally Rhines has joined our team. His extensive knowledge and experience in semiconductors and EDA will be invaluable.”

The rising number of cybersecurity attacks targeting software and hardware systems underscores the need for such solutions. Traditional security methods focus on data, networks, operating systems, and associated firmware, often overlooking the underlying hardware. Caspia’s SDL methodology ensures that the hardware itself is optimised to resist a wide range of security threats.

Caspia uses numerous security sources, including CVE, CWE, and Trust-Hub, to enhance its threat analysis and design techniques. The company’s founding team is recognised for its advanced research and industry leadership.

Rhines, known for his contributions to semiconductor innovation, commented on his new role:

“Data security and assurance at both the hardware and software levels is critically important for continued semiconductor innovation. I’ve been actively involved with the government and through Cornami to address this problem.

“Caspia’s SDL for SoC design is the most comprehensive approach to security and assurance optimization I have seen. It will be a game-changer. I’m delighted to help the Caspia team find its place in history.”